More dissassembly

This commit is contained in:
Sarah Jamie Lewis 2021-11-13 22:19:54 -08:00
parent 63810446dc
commit 334dba8bed
2 changed files with 147 additions and 14 deletions

View File

@ -93,6 +93,19 @@ label strcmp:
label shift_terminal:
; copy terminal 0 to terminal 1
loadi $4 terminal[5] ;src
bcopy $4 terminal[6] ; dest
; copy terminal 0 to terminal 1
loadi $4 terminal[4] ;src
bcopy $4 terminal[5] ; dest
; copy terminal 0 to terminal 1
loadi $4 terminal[3] ;src
bcopy $4 terminal[4] ; dest
; copy terminal 0 to terminal 1
loadi $4 terminal[2] ;src
bcopy $4 terminal[3] ; dest
@ -113,11 +126,42 @@ label shift_terminal:
ret
data ascii diss_load LOAD
data ascii diss_call CALL
data ascii diss_unknown UNKNOWN
data ascii diss_nop nop
data ascii diss_store store
data ascii diss_load load
data ascii diss_load_imm loadi (load immediate)
data ascii diss_call call
data ascii diss_ret ret
data ascii diss_unknown unknown opcode
label append_num_to_string:
tx $8 $4
loadi $6 7
label _append_num_to_string_inner:
tx $4 $8 ; temp store for command
loadi $5 4 ; number of bits to shift
mul $6 $5 $5 ; number of bits to shift command >> (count * 8) (3*8, 2*8, 1*8, 0*8)
shift $4 $5 $1 ; do the actual shift
loadi $5 $00000F
and $1 $5 $4
; clobbers 1 2 3 4
call num_to_char;
bappend $4 command_line_input
tx $1 $6
loadi $2 0
jneq +2
ret
dec $6
jmp _append_num_to_string_inner
label _disassemble_cmd:
loadi $1 $3A ; ':'
bappend $1 command_line_input
loadi $1 $20
bappend $1 command_line_input ; space
@ -125,24 +169,85 @@ label _disassemble_cmd:
shift $4 $1 $2 ;
loadi $5 diss_unknown
loadi $1 $3
; Grab Op Register just in case and put it in $6
loadi $1 $18 ; 24 bits
shift $4 $1 $6 ;
loadi $1 $0F
and $6 $1 $6
; Grab Address just in case and put it in $7
loadi $3 $00FFFFFF
and $4 $3 $7
loadi $C 1 ; default print target reg
loadi $D 1 ; default print addr
; 0x0 = Meta
loadi $1 $0
jneq +7
loadi $C 0 ; default print target reg
loadi $D 0 ; default print addr
loadi $1 0
tx $2 $6
jneq +2
loadi $5 diss_nop
; 0x1 = Store
loadi $1 $1
jneq +2
loadi $5 diss_store
; 0x2 = LOAD
loadi $1 $2
jneq +2
loadi $5 diss_load
loadi $1 $C
; 0x3 = LOAD IMM
loadi $1 $3
jneq +2
loadi $5 diss_load_imm
; 0x0C = Call / Ret
loadi $1 $C
jneq +7
loadi $5 diss_call
loadi 1 0
loadi $C 0 ; don't print address
tx 2 6
jneq +2
loadi $5 diss_ret
label _disassemble_cmd_inner:
rload $5 $1
loadi $2 0
jneq +2
ret
jeq +4 ; _print reg
bappend $1 command_line_input
inc $5
jmp _disassemble_cmd_inner
; Check if we need to prin the register and print it
tx $1 $C
loadi $2 1
jneq +6
loadi $1 $20
bappend $1 command_line_input ; space
tx $4 $6
call num_to_char
bappend $4 command_line_input
; check if we need to print the address and print it
tx $1 $D
loadi $2 1
jneq +6
loadi $1 $20
bappend $1 command_line_input ; space
tx $4 $7
loadi $5 command_line_input
call append_num_to_string
ret
label disassemble:
call string_to_num
; $1 contains a actual address we want to diss
@ -281,6 +386,25 @@ label handle_keypress:
; print some shell history
loadi $9 5;
loadi $A 150;
call set_pos
loadi $4 @terminal[6]
call draw_string;
loadi $9 5;
loadi $A 160;
call set_pos
loadi $4 @terminal[5]
call draw_string;
loadi $9 5;
loadi $A 170;
call set_pos
loadi $4 @terminal[4]
call draw_string;
loadi $9 5;
loadi $A 180;
call set_pos
@ -320,5 +444,4 @@ label handle_keypress:
call draw_string;
updsp
clr
jmp $CB000;

View File

@ -177,8 +177,11 @@ impl Machine {
let dest_reg = (instruction & 0xFF) as usize;
let a = self.memory[REGISTER_PAGE + a_reg];
let b = self.memory[REGISTER_PAGE + b_reg];
let result = a + b;
self.memory[REGISTER_PAGE + dest_reg] = result;
let result = a.overflowing_add(b);
if result.1 {
}
self.memory[REGISTER_PAGE + dest_reg] = result.0;
}
// SUB A B => C
0xA2 => {
@ -188,8 +191,11 @@ impl Machine {
let a = self.memory[REGISTER_PAGE + a_reg];
let b = self.memory[REGISTER_PAGE + b_reg];
let result = a - b;
self.memory[REGISTER_PAGE + dest_reg] = result;
let result = a.overflowing_sub(b);
if result.1 {
}
self.memory[REGISTER_PAGE + dest_reg] = result.0;
}
// MUL A B => C
0xA3 => {
@ -198,8 +204,12 @@ impl Machine {
let dest_reg = (instruction & 0xFF) as usize;
let a = self.memory[REGISTER_PAGE + a_reg];
let b = self.memory[REGISTER_PAGE + b_reg];
let result = a * b;
self.memory[REGISTER_PAGE + dest_reg] = result;
let result = a.overflowing_mul(b);
if result.1 {
}
self.memory[REGISTER_PAGE + dest_reg] = result.0;
}
// RSHIFT A >> B => C
0xA5 => {