This commit is contained in:
Theron Spiegl 2020-01-09 22:17:04 -06:00
parent 709e351832
commit a9582cc240
4 changed files with 6 additions and 43 deletions

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@ -14,7 +14,7 @@ pub trait Mapper {
fn get_mirroring(&mut self) -> Mirror;
}
#[derive(Copy, Clone, PartialEq)]
#[derive(Copy, PartialEq)]
pub enum Mirror {
LowBank,
HighBank,
@ -51,8 +51,6 @@ pub struct Cartridge {
all_data: Vec<u8>,
mapper_num: u8,
// pub cpu_mapper_func: CpuMapperFunc,
// pub ppu_mapper_func: PpuMapperFunc,
}
impl Cartridge {
@ -65,7 +63,6 @@ impl Cartridge {
f.read_to_end(&mut data).unwrap();
assert!(data[0..4] == [0x4E, 0x45, 0x53, 0x1A], "signature mismatch, not an iNES file");
let mapper_num = ((data[7] >> 4) << 4) + (data[6] >> 4);
// let (cpu_mapper_func, ppu_mapper_func) = get_mapper_funcs(mapper);
let mut cart = Cartridge {
prg_rom_size: data[4] as usize,
chr_rom_size: data[5] as usize,
@ -77,8 +74,6 @@ impl Cartridge {
chr_rom: Vec::new(),
all_data: data,
mapper_num: mapper_num,
// cpu_mapper_func: cpu_mapper_func,
// ppu_mapper_func: ppu_mapper_func,
};
cart.fill();
cart

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@ -75,8 +75,6 @@ pub struct Cpu {
// cartridge data
mapper: Rc<RefCell<dyn Mapper>>,
// pub prg_rom: Vec<Vec<u8>>, // one 16 KiB chunk for each specified in iNES header
// mapper_func: crate::cartridge::CpuMapperFunc,
// ppu
pub ppu: super::Ppu,
@ -101,8 +99,6 @@ impl Cpu {
clock: 0,
delay: 0,
mapper: mapper,
// prg_rom: cart.prg_rom.clone(),
// mapper_func: cart.cpu_mapper_func,
ppu: ppu,
apu: apu,
strobe: 0,
@ -197,10 +193,7 @@ impl Cpu {
0x4016 => self.read_controller(),
0x4000..=0x4017 => 0, // can't read from these APU registers
0x4018..=0x401F => 0, // APU and I/O functionality that is normally disabled. See CPU Test Mode.
0x4020..=0xFFFF => { // Cartridge space: PRG ROM, PRG RAM, and mapper registers
// *(self.mapper_func)(self, address, false).unwrap() // unwrapping because mapper funcs won't return None for reads.
self.mapper.borrow_mut().read(address)
},
0x4020..=0xFFFF => self.mapper.borrow_mut().read(address),
_ => panic!("invalid read from 0x{:02x}", address),
};
val
@ -213,15 +206,9 @@ impl Cpu {
0x2000..=0x3FFF => self.write_ppu_reg(address % 8, val),
0x4014 => self.write_ppu_reg(8, val),
0x4016 => self.write_controller(val),
0x4000..=0x4017 => self.apu.write_reg(address, val), // APU stuff
0x4000..=0x4017 => self.apu.write_reg(address, val),
0x4018..=0x401F => (), // APU and I/O functionality that is normally disabled. See CPU Test Mode.
0x4020..=0xFFFF => { // Cartridge space: PRG ROM, PRG RAM, and mapper registers
self.mapper.borrow_mut().write(address, val)
// match (self.mapper_func)(self, address, true) {
// Some(loc) => *loc = val,
// None => (),
// };
},
0x4020..=0xFFFF => self.mapper.borrow_mut().write(address, val),
_ => panic!("invalid write to {:02x}", address),
}
}

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@ -5,14 +5,7 @@ impl super::Ppu {
pub fn read(&mut self, addr: usize) -> u8 {
let address = addr % 0x4000;
match addr {
0x0000..=0x1FFF => {
self.mapper.borrow_mut().read(address)
// if self.pattern_tables.len() > 0 {
// *(self.mapper_func)(self, address, false).unwrap() // unwrapping because mapper funcs won't return None for reads
// } else {
// 0
// }
},
0x0000..=0x1FFF => self.mapper.borrow_mut().read(address),
0x2000..=0x3EFF => self.read_nametable(address),
0x3F00..=0x3FFF => {
let a = address % 0x0020;
@ -26,13 +19,7 @@ impl super::Ppu {
pub fn write(&mut self, addr: usize, value: u8) {
let address = addr % 0x4000;
match addr {
0x0000..=0x1FFF => {
self.mapper.borrow_mut().write(address, value);
// match (self.mapper_func)(self, address, true) {
// Some(loc) => *loc = value,
// None => (),
// }
},
0x0000..=0x1FFF => self.mapper.borrow_mut().write(address, value),
0x2000..=0x3EFF => self.write_nametable(address, value),
0x3F00..=0x3FFF => {
// I did not read this closely enough for a long time.

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@ -19,9 +19,6 @@ pub struct Ppu {
// Cartridge things
pub mapper: Rc<RefCell<dyn Mapper>>,
// pub pattern_tables: Vec<Vec<u8>>, // CHR-ROM, one 8 KiB chunk for each specified in iNES header
// mapper_func: crate::cartridge::PpuMapperFunc,
// mirroring: u8, // 0: horizontal, 1: vertical
// Each nametable byte is a reference to the start of an 8-byte sequence in the pattern table.
// That sequence represents an 8x8 tile, from top row to bottom.
@ -100,9 +97,6 @@ impl Ppu {
x: 0,
w: 0,
mapper: mapper,
// pattern_tables: cart.chr_rom.clone(),
// mapper_func: cart.ppu_mapper_func,
// mirroring: cart.mirroring,
nametable_0: vec![0u8; 0x0400],
nametable_1: vec![0u8; 0x0400],
nametable_2: vec![0u8; 0x0400],