this has kirby looking mostly normal. bar still shakes when scrolling vertically and is off by a few pixels normally, but much improved. smb3 is still bad, worse once level starts.
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8c6899589d
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@ -11,6 +11,7 @@ pub struct Mmc3 {
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irq_counter: u8,
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irq_counter: u8,
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irq_enable: bool,
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irq_enable: bool,
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trigger_irq: bool, // signal to send to CPU
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trigger_irq: bool, // signal to send to CPU
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reload_counter: bool,
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prg_ram_bank: Vec<u8>, // CPU $6000-$7FFF
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prg_ram_bank: Vec<u8>, // CPU $6000-$7FFF
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// 0: $8000-$9FFF swappable, $C000-$DFFF fixed to second-last bank
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// 0: $8000-$9FFF swappable, $C000-$DFFF fixed to second-last bank
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@ -35,6 +36,7 @@ impl Mmc3 {
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irq_counter: 0,
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irq_counter: 0,
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irq_enable: false,
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irq_enable: false,
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trigger_irq: false,
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trigger_irq: false,
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reload_counter: false,
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prg_ram_bank: vec![0; 0x2000],
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prg_ram_bank: vec![0; 0x2000],
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prg_rom_bank_mode: false,
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prg_rom_bank_mode: false,
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chr_rom_bank_mode: false,
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chr_rom_bank_mode: false,
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@ -163,7 +165,7 @@ impl Mapper for Mmc3 {
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0x6000..=0x7FFF => self.prg_ram_bank[address % 0x2000] = value, // PRG-RAM
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0x6000..=0x7FFF => self.prg_ram_bank[address % 0x2000] = value, // PRG-RAM
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0x8000..=0x9FFF => self.bank_data(value),
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0x8000..=0x9FFF => self.bank_data(value),
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0xA000..=0xBFFF => self.prg_ram_protect(),
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0xA000..=0xBFFF => self.prg_ram_protect(),
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0xC000..=0xDFFF => self.irq_counter = 0, // Writing any value to this register reloads the MMC3 IRQ counter at the NEXT rising edge of the PPU address, presumably at PPU cycle 260 of the current scanline.
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0xC000..=0xDFFF => self.reload_counter = true, // Writing any value to this register reloads the MMC3 IRQ counter at the NEXT rising edge of the PPU address, presumably at PPU cycle 260 of the current scanline.
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0xE000..=0xFFFF => self.irq_enable = true,
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0xE000..=0xFFFF => self.irq_enable = true,
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_ => println!("bad address written to MMC3: 0x{:X}", address),
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_ => println!("bad address written to MMC3: 0x{:X}", address),
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}
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}
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@ -183,8 +185,18 @@ impl Mapper for Mmc3 {
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fn save_battery_backed_ram(&self) {}
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fn save_battery_backed_ram(&self) {}
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fn clock(&mut self) {
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fn clock(&mut self) {
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if self.reload_counter {
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self.irq_counter = self.irq_latch;
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self.reload_counter = false;
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}
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// "Should reload and set IRQ every clock when reload is 0."
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if self.irq_latch == 0 && self.irq_enable {
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self.irq_counter = self.irq_latch;
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self.trigger_irq = true;
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}
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if self.irq_counter == 0 {
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if self.irq_counter == 0 {
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self.irq_counter = self.irq_latch;
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self.irq_counter = self.irq_latch;
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return;
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} else {
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} else {
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self.irq_counter -= 1;
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self.irq_counter -= 1;
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}
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}
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@ -99,6 +99,7 @@ impl super::Ppu {
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// cpu writes to 0x2006, PPUADDR
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// cpu writes to 0x2006, PPUADDR
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pub fn write_address(&mut self, val: u8) {
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pub fn write_address(&mut self, val: u8) {
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self.mapper.borrow_mut().clock();
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let d = val as u16;
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let d = val as u16;
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match self.w { // first write
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match self.w { // first write
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0 => {
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0 => {
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@ -243,21 +243,26 @@ impl Ppu {
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}
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}
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// deal with mapper MMC3
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// deal with mapper MMC3
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if self.rendering() && (
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// if self.rendering()
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self.line_cycle == 260
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// && (1..241).contains(&self.scanline)
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&& self.sprite_size == 8
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// && (
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&& self.background_pattern_table_base == 0x0000
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// (
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&& self.sprite_pattern_table_base == 0x1000
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// self.line_cycle == 260
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) || (
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// && self.sprite_size == 8
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self.line_cycle == 324
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// && self.background_pattern_table_base == 0x0000
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&& self.sprite_size == 8
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// && self.sprite_pattern_table_base == 0x1000
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&& self.background_pattern_table_base == 0x1000
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// ) || (
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&& self.sprite_pattern_table_base == 0x0000
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// self.line_cycle == 324
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) || (
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// && self.sprite_size == 8
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self.line_cycle == 260
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// && self.background_pattern_table_base == 0x1000
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&& self.sprite_size == 16
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// && self.sprite_pattern_table_base == 0x0000
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// TODO: figure out exact conditions here
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// ) || (
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)
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// self.line_cycle == 260
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// && self.sprite_size == 16
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// // TODO: figure out exact conditions here
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// )
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// )
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if self.rendering() && self.line_cycle == 260 && (1..241).contains(&self.scanline)
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{
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{
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self.mapper.borrow_mut().clock()
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self.mapper.borrow_mut().clock()
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}
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}
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